1. Field of Invention
The present teachings presented herein relate to a variable-gain amplifier. More specifically, the present teachings relate to methods and systems for improved variable-gain amplifier employing a tapped-attenuator ladder.
2. Discussion of Related Art
A variable gain amplifier (VGA) is used in a wide variety of communication system applications. In most applications, it is necessary for the VGA to maintain good dynamic range across the full gain control range. Other desirable characteristics of a VGA include high linearity, linear-in-dB gain control, low noise, low DC power consumption, CMOS compatibility, high frequency operation, large signal handling capability, and a gain control relation that is insensitive to ambient temperature.
VGA's have been used for many years, and a variety of techniques have been employed to achieve this critical circuit function. The types of VGA's reported in the literature generally fall into several broad categories. Current steering is an abundant method that usually employs some type of emitter-coupled bipolar junction transistor (BJT) pair to steer a fraction of current based on a ΔVbe control voltage. The bias control method alters the bias point of a transistor device to affect gm and the resulting gain. PIN diodes or MOSFET resistors are often used to degenerate the gain of amplifiers in a continuously variable fashion. Another method relies on a class of circuits known as multi-Tanh cells to affect the gain of a gm block. Although simple to implement, these four general methods to realize a VGA often suffer from poor linearity and small input signal handling capability.
One approach to address some of the short-comings of conventional VGAs is disclosed in U.S. Pat. No. 5,077,541 by Gilbert, entitled “Variable-Gain Amplifier Controlled by an Analog Signal and Having a Large Dynamic Range,” issued Dec. 31, 1991. This patent describes a variable-gain amplifier employing a fixed resistive attenuator ladder with a plurality of high impedance tap points to sample the signal at each of the attenuator nodes. The signal voltage at these tap points are converted to signal currents that are summed into an operational amplifier to create a composite gain function. The effective transconductance gain of each tap point is varied in the specified method to produce a continuous gain function. The fixed attenuator ladder aims at providing a stable input impedance with large input signal handling capability across the entire linear-in-dB gain range.
Although Gilbert method of signal tapping and gain interpolation control may be attractive in bipolar technology, it is less desirable in CMOS technology. Implementing the gm taps in CMOS is prone to upconverted 1/f noise due to the nature of current-carrying MOS transistors, and the gm errors are substantially greater due to the poor MOSFET Vth matching compared to BJT Vbe matching.
A CMOS-compatible, attenuator-based VGA is disclosed in U.S. Pat. No. 7,205,817 by Huang, entitled “Analog Control Integrated FET Based Variable Attenuator,” issued Apr. 17, 2007. This patent describes a method of assembling and controlling a plurality of series and parallel MOS devices to implement a variable attenuator. Huang avoids critical Vth matching issues and eliminates DC bias currents within the attenuator, but it involves controlling both the series and parallel elements along the attenuator ladder. This yields a more difficult control circuit that often results in a gain-control function with significantly bumpy deviations from the ideal linear-in-dB gain law. Controlling distortion throughout the gain control range is also difficult and requires floating P-wells of a sort not typically found in a standard N-well CMOS process.